OLIX, FRACTILE, ETCHED: billions are flowing into AI’s future engines
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While the training of large models has long attracted most investment, reasoning models are shifting the battle towards inference. OLIX, FRACTILE and ETCHED have collectively raised more than $1.5 billion to accelerate token generation, reduce energy costs and challenge the architecture imposed by NVIDIA. Yet behind this shared ambition lie three technological bets, three levels of maturity and three very different industrial models.
Just over two years after its creation, OLIX is already valued at $3.3 billion. The British startup has announced a $312 million funding round backed by Fundomo, ARM, Hudson River Trading and Netflix co-founder Reed Hastings. Six months earlier, it had already raised $220 million at a valuation slightly above $1 billion.
- OLIX, FRACTILE and ETCHED have collectively raised more than $1.5 billion to accelerate inference, which is becoming AI’s new economic centre of gravity.
- Three technological bets are competing: SRAM and photonics at OLIX, bringing memory and compute closer together at FRACTILE, and specialisation around Transformers at ETCHED.
- The three startups are at very different stages of industrial maturity, ranging from design and first silicon to rack validation.
- Their challenge is not merely to outperform an NVIDIA chip, but to deliver a complete system combining hardware, memory, networking, compilers and cooling.
- The real test will come in 2027: generating more tokens, faster and at a sufficiently low cost to offset the complexity of these new infrastructures.
The increase is all the more spectacular because the company’s first chip has yet to leave the factory. OLIX plans to complete its design before the end of 2026 and deliver its first systems in 2027. For now, its investors are financing a team, an architecture and a timetable. Quite a wager.
Nor is OLIX an isolated case. In May, fellow British company FRACTILE raised $220 million from ACCEL, FACTORIAL FUNDS and FOUNDERS FUND, with participation from CONVICTION, FELICIS, 8VC, GIGASCALE, O1A and BUCKLEY VENTURES. The financing is intended, among other things, to enable the company, founded in 2022 by Walter Goodwin, to produce its first processors.
In the United States, ETCHED says it has raised $800 million across four financing rounds and recruited more than 400 engineers. Its first A0 silicon, manufactured by TSMC using its N4P process, is reportedly undergoing validation. The startup also says it has secured more than $1 billion in orders, with the first deliveries expected this summer.
All three present themselves as challengers to NVIDIA. Yet behind this shared ambition lie three very different levels of industrial maturity. In a sector where a promising simulation, a functioning chip and a rack operating in production are sometimes announced with equal enthusiasm, the distinction matters all the more.
Inference is becoming the real mass market
Until now, competition in artificial intelligence has largely focused on training. Announcements from laboratories and semiconductor manufacturers were framed around model size, compute capacity and the number of GPUs assembled into ever-larger clusters.
While training remains critical, its economics are particular. Training represents a considerable but concentrated expense. Once a model has been built, every use generates a new computing cost. This is inference: the moment when the system answers a question, generates code, analyses a document or performs a task.
The emergence of reasoning models amplifies this second expense. To produce a complex answer, these systems use more compute at runtime as they explore several possible solutions, call tools and potentially verify a result before returning it. Future agents should extend this trend by carrying out tasks for several minutes, several hours or even longer.
A model can therefore outperform its competitors while remaining economically difficult to deploy if every response is too slow or expensive. The question is no longer simply which system produces the best result, but how many users it can serve simultaneously, at what speed and with how much energy.
Theoretical computing power is consequently giving way, in part, to cost per token. At the same time, laboratories are working to reduce the amount of compute required to achieve a given result. Distillation, quantisation, speculative decoding, KV-cache compression, smaller specialised models and routing between several architectures can materially improve inference efficiency.
A simple request can be assigned to a small model, while a frontier model is activated only for more complex tasks. Reasoning can also be stopped once the system determines that it has a sufficient answer. The same quality of service may then be achieved with fewer tokens, less memory or lower numerical precision.
OLIX, FRACTILE and ETCHED are therefore betting not only on increasing usage, but on demand for compute growing faster than software efficiency gains. Their first competitor is not always another chip. It may also be a better algorithm.
A single answer already requires two engines
To understand the differences between the three startups, it is necessary to distinguish between the two main stages of inference.
The first, known as prefill, involves reading and processing the initial request. When a user submits a question, several hundred pages or a codebase, the system must first analyse all that information. The operation is highly parallelisable and requires substantial computing power.
The second stage, decode, is the generation of the response. The model produces tokens sequentially, with each depending on those that came before it. This operation is more sequential and particularly sensitive to the speed at which parameters can be retrieved from memory.
A GPU can handle both stages, but this versatility is not necessarily optimal. One engine may be highly efficient at processing a vast context while being less effective at generating a long response quickly. Another may produce tokens with very low latency while being less suited to the initial processing of a large document.
James Dacombe, the founder of OLIX, is an advocate of this specialisation. He argues that the era in which a single NVIDIA chip could handle every AI workload is reaching its limits. In his view, the economics of inference now justify creating custom silicon for specific operations.
Specialisation nevertheless introduces a difficulty. If prefill is performed by one architecture and decode by another, the model’s state must move between them. This includes the KV cache, the temporary memory in which information already processed by the model is stored. The longer the context, the larger the cache. Moving it can require considerable bandwidth and recreate, between two accelerators, the very bottleneck that specialisation was intended to eliminate within each one.
Inference may therefore become more fragmented, but that fragmentation is not free. The gains made in token generation must remain greater than the cost of coordinating the different engines.
OLIX wants to accelerate the next token with light
OLIX has chosen to begin with decode. Its first system, the DX-1, or Decode Accelerator 1, is designed to accelerate token generation while combining two characteristics that are difficult to reconcile: high throughput at rack scale and low latency for each user.
The startup takes a critical view of existing architectures. GPUs depend on high-bandwidth memory, or HBM, which supplies data rapidly to computing units. But HBM is particularly expensive, difficult to produce and reliant on advanced packaging capabilities concentrated among a limited number of suppliers.
OLIX wants to move beyond this framework by building an architecture based on SRAM, a very fast form of memory located close to the processor, but one that is also less dense and more costly in terms of silicon area. To overcome this limitation, the company plans to distribute memory and compute across the rack and connect the various components through photonic interconnects.
Light is expected to move data faster and more efficiently than certain electrical connections. The objective is to redesign the entire route taken by data, from memory to chips and then between the different components inside the rack.
In its manifesto, OLIX claims that an SRAM architecture combined with photonics can outperform HBM-based systems in throughput per megawatt, total cost of ownership and interactivity.
The architecture also has an industrial dimension. OLIX says it can reduce its dependence on the most advanced manufacturing nodes, HBM and the packaging technologies currently in greatest demand. In an industry where access to manufacturing capacity can determine timelines more than design quality, circumventing shortages could prove as important as theoretical performance.
OLIX does not, however, eliminate complexity. It moves it elsewhere. SRAM occupies more silicon area. Larger dies can produce lower yields. Lasers, optical interfaces and photonic components must be integrated, aligned and tested. Photonic packaging remains a demanding industrial discipline, involving equipment that will have to operate continuously for years under data-centre thermal conditions.
The tape-out planned before the end of 2026 will be an essential milestone, but not the finish line. OLIX will then need to demonstrate that the silicon works, that manufacturing yields are acceptable, that the compiler can run the expected models and that the complete system can be produced at a competitive cost.
FRACTILE wants to bring compute and memory closer together
FRACTILE starts from the same problem but has chosen a different route. The British startup believes that the most advanced models will soon be constrained not only by their capabilities, but by the time required to execute their reasoning.
As tasks become longer, volumes become considerable. An agentic application may generate millions of tokens while searching for information, producing code, testing several solutions and checking the result. At only a few dozen tokens per second, a complex task can still take several days to complete.
Walter Goodwin, its founder, therefore believes that generation speed will directly determine which use cases are accessible to future models. FRACTILE is not simply seeking to make today’s answers faster. It wants to enable workloads that remain economically or practically unfeasible.
Once again, the bottleneck lies in data movement. Compute units may perform the required mathematical operations rapidly, but they must constantly retrieve model parameters from memory. A significant share of time and energy is consumed by these transfers.
FRACTILE says it has redesigned the inference stack from circuits to software to bring compute and memory closer together. An early generation of its architecture was also described by ANDES TECHNOLOGY as using circuits capable of executing a large proportion of inference operations directly within on-chip memory. According to ANDES, FRACTILE has also licensed a RISC-V vector processor for its accelerator.
The company nevertheless discloses few specifications about the product it now plans to manufacture. The type of memory, capacity per system, rack organisation and management of the KV cache all remain unclear. This discretion is understandable in such a competitive market, but it makes any direct comparison with OLIX, ETCHED or NVIDIA difficult.
The performance multiples associated with its architecture should therefore be treated as objectives until they have been measured on silicon and independently verified.
FRACTILE is also racing against time. Its first generation will enter a market in which NVIDIA, AMD, hyperscalers and several startups will already have renewed their systems.
ETCHED is etching its bet into silicon
ETCHED represents the most radical bet of the three. The American startup was created around the idea that, because the most advanced models rely heavily on the Transformer architecture, it is possible to build a specialised circuit by giving up some of the versatility offered by GPUs.
Flexibility has a cost. A GPU must be able to perform very different calculations, from AI training to scientific simulation. A specialised chip can devote more silicon area, bandwidth and energy to the operations actually used by Transformers.
This strategy exposes ETCHED to an existential question. If models shift significantly towards other architectures, part of its advantage could disappear. But the company does not need the Transformer to last forever. It only needs it to remain dominant long enough to amortise several generations of silicon.
Its positioning has also expanded. ETCHED no longer presents itself simply as the designer of Sohu, its Transformer-specific ASIC. It now intends to control the chips, memory, software, cooling, interconnects and certain manufacturing processes.
Unlike OLIX, ETCHED is not seeking to eliminate HBM. Its architecture combines HBM and SRAM to retain both substantial memory capacity and low latency. The company highlights Cluster Scale Memory, a shared memory pool operating across the cluster, as well as Low Voltage Inference, an architecture designed to increase compute density without causing excessive thermal throttling.
It is therefore an almost opposite response to OLIX’s. OLIX considers that the processor-interposer-HBM model is reaching its limits. ETCHED believes it can reorganise that model by combining several forms of memory and optimising the system as a whole. The former adds photonics to scale a distributed SRAM architecture; the latter claims it can achieve the desired balance without using optics.
FRACTILE occupies a third position based on tighter integration between memory and compute. The three companies agree on the diagnosis, but not on where the problem begins.
Of the three, ETCHED currently appears the most industrially advanced. The company says it has received its first silicon, begun validating its racks and secured more than $1 billion in demand. It remains unclear, however, whether this figure represents firm orders, capacity reservations, performance-dependent agreements or non-binding letters of intent.
It will also be necessary to determine whether deposits have been paid, whether commitments can be cancelled and over what period deliveries are expected. In an industry where customers sometimes reserve capacity before validating the product, the order book can reflect anticipated scarcity as much as future revenue.
Benchmarks can tell almost any story
Comparing the three architectures requires more than a tokens-per-second figure.
Results depend on the model used, its size, numerical precision, context length, number of simultaneous users and batch size. One system may display considerable aggregate throughput by grouping many requests while producing tokens slowly for each user. Conversely, an architecture that is highly responsive for a single request may become uneconomical when serving many customers.
A chip can also gain speed by using lower numerical precision or a quantised version of a model, even though this optimisation may affect certain capabilities. Speed, cost and output quality must therefore be measured simultaneously.
Most importantly, customers do not buy a chip in isolation. They pay for the power consumed by the complete rack: processors, memory, interconnects, switches, storage, power supplies and cooling. An architecture that is particularly efficient at the silicon level may lose part of its advantage once integrated into a complete system.
The available evidence can therefore be placed on a relatively simple scale. Simulation comes first, followed by company-reported performance, functioning silicon, internal benchmarks, independent testing, customer qualification and, finally, continuous production operation.
OLIX, FRACTILE and ETCHED have not yet reached the same point on this scale. Their valuations should not be compared without considering the distance that still separates each of them from a product running daily in production.
NVIDIA defends an environment, not just a chip
The three startups nevertheless share one characteristic: none plans to sell only a component.
OLIX is preparing a rack combining its chips, interconnects, networking and software. FRACTILE is developing its technology from circuits through to inference servers. ETCHED is assembling processors, memory, cooling and a software environment within complete clusters.
This integration is less a choice than a necessity. NVIDIA’s dominance no longer rests solely on GPU performance. The group controls a stack combining CUDA, software libraries, compilers, NVLink, networking equipment, servers and rack-scale architectures.
A competitor can outperform an NVIDIA chip on a specific operation and still fail commercially because a model is too difficult to port, a library is missing or the customer must mobilise dozens of engineers to operate the system.
The compiler is therefore becoming a critical component. It translates models developed with the main frameworks into instructions that a new architecture can execute. OLIX says it used artificial intelligence tools to accelerate the development of its own compiler. Its completion reportedly represented a significant milestone for investors in the latest round.
NVIDIA, meanwhile, is not remaining trapped in the universal GPU. The company is specialising its architectures, developing optical interconnects and incorporating GROQ’s LPU technology into its inference portfolio. Its GROQ 3 LPX system combines 256 SRAM-based accelerators in a single rack, according to specifications published by NVIDIA.
The competition is therefore not between agile startups and a static incumbent. NVIDIA has the financial, industrial and software resources to integrate rapidly the innovations that threaten its architecture.
Hyperscalers are both customers and competitors
The market available to startups is also narrower than it may appear. Buyers capable of ordering thousands of racks are primarily hyperscalers, frontier-model laboratories, neoclouds and a handful of governments building sovereign infrastructure.
Yet the largest potential customers are already developing their own chips. GOOGLE has its TPUs. AWS offers TRAINIUM accelerators for training and inference, as well as INFERENTIA for serving models. AWS integrates them directly into its cloud and its Neuron software environment. MICROSOFT is deploying MAIA 200, an accelerator specifically designed for inference and integrated into AZURE. The company says it has jointly optimised the chip, memory, network and SDK. META, meanwhile, is developing its MTIA processors.
These groups can therefore become customers, validation partners, competitors and potential acquirers of OLIX, FRACTILE or ETCHED. They possess the models, workloads and data centres required to optimise their own silicon. They can test an external technology, learn from it and then decide whether to integrate it or develop an internal alternative.
The startups are caught between two types of customers. The largest have the resources to design their own accelerators. Smaller buyers do not always have the teams or financial capacity required to adopt an entirely new platform.
This tension explains why several emerging chipmakers are considering selling compute capacity directly or offering a service priced per token. But that choice moves them closer to the even more capital-intensive business of operating a cloud.
The rack is now the real product
Selling racks involves economics very different from those of a software publisher. Manufacturers must pay foundries, reserve production capacity, purchase memory, boards and networking equipment, build inventories, organise support and replace defective components. They may spend substantial sums several months before customers pay them.
Rapid growth can therefore increase financing requirements instead of reducing them. OLIX, FRACTILE and ETCHED will have to choose between several models. Selling chips limits commercial investment but reduces control over the system. Selling racks increases revenue but requires more working capital. Renting compute capacity or charging per token creates recurring revenue but requires the company to finance and operate data centres.
The decisive question is therefore not only one of performance. It concerns the nature of the product being sold and the margin retained after manufacturing, networking, cooling and support have been deducted.
Energy efficiency must also be assessed with some distance. Lowering the cost per token does not guarantee a reduction in total energy consumption. If tokens become cheaper, models can reason for longer, agents can perform more actions and applications can serve more users.
A more efficient chip can reduce the energy used by a single operation while making much greater overall consumption economically viable. The industry knows this paradox well: efficiency sometimes creates the demand it was supposed to contain.
British champions in a still-global value chain
The presence of OLIX and FRACTILE in the United Kingdom confirms the country’s ability to concentrate expertise in processor design, photonics, compilers and inference systems.
ARM’s investment in OLIX is strategically significant in this respect. The British group can position itself at the heart of several emerging architectures without immediately having to determine which one will prevail.
But British design does not mean that the chips will be manufactured in the United Kingdom. The startups will remain dependent on Asian foundries, memory manufacturers, packaging specialists and equipment sourced from the United States, Europe and Japan.
Their growth strengthens the United Kingdom’s intellectual sovereignty, but it does not guarantee industrial autonomy. Value will be distributed across intellectual property, manufacturing, packaging, software and data-centre operations, stretching from London to Taiwan and beyond.
A chip can become obsolete before it has been amortised
Hardware development cycles are considerably longer than model cycles. Between the start of a design and commercial delivery, numerical formats can change, Mixture-of-Experts models can become more widespread, context windows can expand and the balance between prefill and decode can shift. An architecture optimised for 2026 models must remain relevant when installed in 2027 and then operated until 2029 or beyond.
This issue is particularly important for highly specialised architectures. ETCHED must bet on the continued relevance of the operations it hardwires into silicon. OLIX must anticipate changes in decode and memory requirements. FRACTILE must design an architecture flexible enough to support several generations of models.
Customers, meanwhile, do not simply want the fastest system at the time of installation. They need to know whether the resulting savings will allow them to amortise the rack before the architecture becomes outdated.
2027: when valuations meet silicon
The capital currently being raised gives the three companies the resources to hire, reserve manufacturing capacity and build the systems surrounding their chips. It does not eliminate any of the steps required for validation.
OLIX will have to complete its tape-out successfully, demonstrate the operation of its photonic interconnect and explain how its architecture handles models that substantially exceed the capacity of an individual chip. FRACTILE will have to publish more details, produce its first silicon and confirm its performance on real-world models. ETCHED will have to convert announced demand into delivered racks and prove that its architecture can keep pace with rapidly evolving models.
One of these companies may ultimately impose its platform. It is equally plausible that each will find a place within a fragmented inference chain.
AI’s future engine may not be a single chip, but a chain of specialised processors. The question is whether the cost of coordinating them will ultimately absorb the gains each one promises. That is what the coming years will reveal.



